A correlated double sampling (CDS) circuit including a comparator, the comparator including: a signal input unit including a first transistor configured to receive a ramp signal and a second transistor configured to receive a pixel signal; and an offset generator unit connected to the signal input unit, the offset generator unit including at least two transistors, wherein in the offset generator unit, an aspect ratio of the at least two transistors in an auto-zeroing period and an aspect ratio of the at least two transistors in a pixel signal decoding period are different from each other.