Invention Application
- Patent Title: FREQUENCY SYNTHESIS WITH REFERENCE SIGNAL GENERATED BY OPPORTUNISTIC PHASE LOCKED LOOP
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Application No.: US16292717Application Date: 2019-03-05
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Publication No.: US20200287557A1Publication Date: 2020-09-10
- Inventor: Gil Horovitz , Sharon Malevsky , Evgeny Shumaker , Igal Kushnir
- Applicant: Intel Corporation
- Main IPC: H03L7/099
- IPC: H03L7/099 ; H04B1/00

Abstract:
Systems, methods, and circuitries are provided to generate a radio frequency (RF) signal having a desired radio frequency fRF. In one example a frequency synthesizer system includes a clock, an opportunistic phase locked loop (PLL), and an RF PLL. The clock circuitry is configured to generate a clock signal having a frequency fXTL. The opportunistic phase locked loop (PLL) is configured to generate a reference signal having a reference frequency fREF that is close to a free-running frequency of an oscillator in the opportunistic PLL. The opportunistic PLL is configured to synchronize the reference signal to the clock signal. The RF PLL is configured to generate the RF signal having the desired radio frequency and to synchronize the RF signal with the reference signal.
Public/Granted literature
- US10804911B2 Frequency synthesis with reference signal generated by opportunistic phase locked loop Public/Granted day:2020-10-13
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