An integrated circuit according to an embodiment of the disclosure may include a plurality of function blocks, a spread spectrum clock (SSC) generator that generates a spread spectrum clock based on a frequency modulation rate value, a clock distribution circuit that distributes the generated spread spectrum clock into the plurality of function blocks, a memory that stores predetermined frequency modulation rate values respectively corresponding to the plurality of function blocks, and a control circuit, and the control circuit may be configured to generate the spread spectrum clock based on a smaller frequency modulation rate value among a first frequency modulation rate value and a second frequency modulation rate value respectively corresponding to a first function block and a second function block, which are operating, from among the plurality of function blocks. Moreover, various embodiment found through the present disclosure are possible.