Invention Application
- Patent Title: MEMORY SYSTEM
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Application No.: US16807220Application Date: 2020-03-03
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Publication No.: US20210089392A1Publication Date: 2021-03-25
- Inventor: Masanobu SHIRAKAWA , Hideki YAMADA , Marie TAKADA , Ryo YAMAKI , Osamu TORII , Naomi TAKEDA
- Applicant: Kioxia Corporation
- Applicant Address: JP Minato-ku
- Assignee: Kioxia Corporation
- Current Assignee: Kioxia Corporation
- Current Assignee Address: JP Minato-ku
- Priority: JP2019-170436 20190919
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G06F9/30

Abstract:
According to one embodiment, a memory system controls a shift resister memory and writes encoded data including a plurality of error correction code frames into a block of the shift resister memory. The memory system is configured to store, into a location corresponding to a first layer in a first data storing shift string, first data included in a first error correction code frame, to store, into a location corresponding to a second layer in the first data storing shift string, second data included in a second error correction code frame, and to store, into a location corresponding to the second layer in a second data storing shift string, third data included in the first error correction code frame.
Public/Granted literature
- US11347584B2 Memory system Public/Granted day:2022-05-31
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