Invention Application
- Patent Title: Integrated Assemblies Having Barrier Material Between Silicon-Containing Material and Another Material Reactive with Silicon
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Application No.: US16579577Application Date: 2019-09-23
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Publication No.: US20210091009A1Publication Date: 2021-03-25
- Inventor: Devesh Kumar Datta , David Daycock , Keen Wah Chow , Tom George , Justin B. Dorhout , Bingli Ma , Rita J. Klein , John Mark Meldrim
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: H01L23/532
- IPC: H01L23/532 ; H01L23/522 ; H01L23/528 ; H01L27/11519 ; H01L27/11524 ; H01L27/11565 ; H01L27/1157

Abstract:
Some embodiments include a memory device having a conductive structure which includes silicon-containing material. A stack is over the conductive structure and includes alternating insulative levels and conductive levels. Channel material pillars extend through the stack and are electrically coupled with the conductive structure. Memory cells are along the channel material pillars. A conductive barrier material is under the silicon-containing material. The conductive barrier material includes one or more metals in combination with one or more nonmetals. An electrical contact is under the conductive barrier material. The electrical contact includes a region reactive with silicon. Silicon is precluded from reaching said region at least in part due to the conductive barrier material. Control circuitry is under the electrical contact and is electrically coupled with the conductive structure through at least the electrical contact and the conductive barrier material.
Information query
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