Invention Application
- Patent Title: NTERCONNECT STRUCTURES AND METHODS OF FABRICATION
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Application No.: US16586279Application Date: 2019-09-27
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Publication No.: US20210098360A1Publication Date: 2021-04-01
- Inventor: Manish Chandhok , Ramanan Chebiam , Brennen Mueller , Colin Carver , Jeffery Bielefeld , Nafees Kabir , Richard Vreeland , William Brezinski
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01L23/535 ; H01L23/00 ; H04B1/40

Abstract:
An integrated circuit interconnect structure includes a first interconnect in a first metallization level and a first dielectric adjacent to at least a portion of the first interconnect, where the first dielectric having a first carbon content. The integrated circuit interconnect structure further includes a second interconnect in a second metallization level above the first metallization level. The second interconnect includes a lowermost surface in contact with at least a portion of an uppermost surface of the first interconnect. A second dielectric having a second carbon content is adjacent to at least a portion of the second interconnect and the first dielectric. The first carbon concentration increases with distance away from the lowermost surface of the second interconnect and the second carbon concentration increases with distance away from the uppermost surface of the first interconnect.
Information query
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