Invention Application
- Patent Title: METALLIZATION BARRIER STRUCTURES FOR BONDED INTEGRATED CIRCUIT INTERFACES
-
Application No.: US16585666Application Date: 2019-09-27
-
Publication No.: US20210098387A1Publication Date: 2021-04-01
- Inventor: Carl Naylor , Mauro Kobrinsky , Richard Vreeland , Ramanan Chebiam , William Brezinski , Brennen Mueller , Jeffery Bielefeld
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L23/532
- IPC: H01L23/532 ; H01L21/768

Abstract:
Composite integrated circuit (IC) device structures that include two components coupled through a hybrid bonded composite interconnect structure. The two components may be two different monolithic IC structures (e.g., chips) that are bonded over substantially planar dielectric and metallization interfaces. Composite interconnect metallization features formed at a bond interface may be doped with a metal or chalcogenide dopant. The dopant may migrate to a periphery of the composite interconnect structure and form a barrier material that will then limit outdiffusion of a metal, such as copper, into adjacent dielectric material.
Public/Granted literature
- US11532558B2 Metallization barrier structures for bonded integrated circuit interfaces Public/Granted day:2022-12-20
Information query
IPC分类: