- 专利标题: SEQUENTIAL PREFETCHING THROUGH A LINKING ARRAY
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申请号: US16833306申请日: 2020-03-27
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公开(公告)号: US20210303470A1公开(公告)日: 2021-09-30
- 发明人: Scheheresade Virani , Aleksei Vlasov , Mark Ish
- 申请人: Micron Technology, Inc.
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 主分类号: G06F12/0853
- IPC分类号: G06F12/0853 ; G06F12/123 ; G06F9/50 ; G06F11/30
摘要:
Methods, systems, and devices for sequential prefetching through a linking array are described. A prefetch manager can detect that a set of tags occupying a queue of a memory sub-system corresponds to a single read descriptor indicating a sequential read pattern. The prefetch manager can determine that a number of the set of tags occupying the queue is below a queue threshold and store data associated with at least one tag of the set of tags in an internal performance memory of the memory sub-system based on the detecting and the determining. In such cases, the prefetch manager can prefetch data from a memory manager and store in the internal performance memory.
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