Invention Application
- Patent Title: BCD IC WITH GATE ETCH AND SELF-ALIGNED IMPLANT INTEGRATION
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Application No.: US17411431Application Date: 2021-08-25
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Publication No.: US20220068649A1Publication Date: 2022-03-03
- Inventor: Mona M. Eissa , Jason R. Heine , Pushpa Mahalingam , Henry Litzmann Edwards , James Robert Todd , Alexei Sadovnikov
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Main IPC: H01L21/266
- IPC: H01L21/266 ; H01L29/78 ; H01L29/66 ; H01L29/10 ; H01L29/423

Abstract:
A method of fabricating an IC includes providing a substrate including a semiconductor surface having well diffusions for a plurality of devices including bipolar, complementary metal oxide semiconductor (CMOS), and double-diffused MOS (DMOS) devices. A polysilicon layer is deposited on a dielectric layer over the semiconductor surface, an anti-reflective coating (ARC) layer is formed on the polysilicon layer, and a photoresist pattern is formed on the ARC layer. The ARC layer is etched in areas exposed by the photoresist pattern to define areas including gate areas having the ARC layer on the polysilicon layer. The photoresist pattern is removed. Polysilicon etching is performed in areas lacking the ARC layer to form polysilicon gates having a remaining ARC portion of the ARC layer thereon. A self-aligned ion implant uses the remaining ARC portion as an additional implant blocking layer for the polysilicon gates, and the remaining ARC portion is stripped.
Information query
IPC分类: