Invention Application
- Patent Title: MANAGEMENT OF ERASE SUSPEND AND RESUME OPERATIONS IN MEMORY DEVICES
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Application No.: US17562329Application Date: 2021-12-27
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Publication No.: US20220121385A1Publication Date: 2022-04-21
- Inventor: Chandra M. Guda , Suresh Rajgopal
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
A processing device determines a duration for executing a portion of an erase operation based on a plurality of execution times of erase operations performed on a memory device. The processing device executes the portion of the erase operation. Responsive to detecting expiration of the duration for executing the erase operation, the processing logic executes an erase suspend operation to suspend the erase operation. Responsive to detecting completion of the erase suspend operation, the processing logic executes one or more commands. The processing device further executes an erase resume operation to resume the erase operation on the memory device.
Public/Granted literature
- US11861207B2 Management of erase suspend and resume operations in memory devices Public/Granted day:2024-01-02
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