A smoothing circuit 2 for an inverter includes a parallel flat plate 21, a plurality of capacitors 22 arranged in a matrix and mounted on the parallel flat plate 21, and a thermal conductive sheet 23 interposed between the parallel flat plate 21 and a housing 4 in an area overlapping a mounting area 21c of the plurality of capacitors 22 when viewed along a normal direction of the parallel flat plate 21. The plurality of capacitors 22 are arranged in such a manner that adjacent terminals 221 of adjacent capacitors 22 have a same polarity in a row direction and a column direction.