Invention Application
- Patent Title: TECHNOLOGIES TO COMPENSATE FOR ERRORS IN TIME SYNCHRONIZATION DUE TO CLOCK DRIFT
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Application No.: US17561398Application Date: 2021-12-23
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Publication No.: US20220123849A1Publication Date: 2022-04-21
- Inventor: David McCall , Kevin Stanton
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H04J3/06
- IPC: H04J3/06 ; H04W56/00

Abstract:
The present disclosure provides techniques for measuring and compensating for clock drift errors in time-aware networks and time-sensitive applications, where a time-aware system (TAS) measures clock drift, and compensates for the measured clock drift, and makes predictions of future clock drift values based on history and other physical measurements. Existing messages used for measuring link delay and/or used for time synchronization can be used for frequency measurement (and thus clock drift measurement), and this measured drift can be applied as a correction factor whenever synchronization is determined and/or used. The predicted clock drift rate can be based on various probability distributions including linear, Kalman filters, and/or others. Other embodiments may be described and/or claimed.
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