Invention Application
- Patent Title: Methods and Arrangements for Reverse Synchronization on a Wireless Medium
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Application No.: US17561854Application Date: 2021-12-24
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Publication No.: US20220124656A1Publication Date: 2022-04-21
- Inventor: Ganesh Venkatesan , Elad Oren , Susruth Sudhakaran
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H04W56/00
- IPC: H04W56/00 ; H04L7/00

Abstract:
Logic to receive a first set of two or more timing management frames wherein one or more of the two or more timing management frames in the first set comprise a first adjusted follower clock value. Logic to calculate a second adjusted clock value. Logic to cause transmission of a second set of two or more timing management frames, wherein one or more of the two or more timing management frames in the second set comprise the second adjusted clock value. Logic to cause transmission of a first set of two or more acknowledgement frames. Logic to receive a second set of two or more acknowledgement frames. And logic to calculate a difference between the first adjusted follower clock value and the second adjusted clock value to determine a synchronization error, the synchronization error to represent a performance of the time synchronization.
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