Invention Application
- Patent Title: ENLARGED WAVEGUIDE FOR PHOTONIC INTEGRATED CIRCUIT WITHOUT IMPACTING INTERCONNECT LAYERS
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Application No.: US17082291Application Date: 2020-10-28
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Publication No.: US20220128762A1Publication Date: 2022-04-28
- Inventor: Yusheng Bian , Ryan W. Sporer , Karen A. Nummy
- Applicant: GLOBALFOUNDRIES U.S. Inc.
- Applicant Address: US CA Santa Clara
- Assignee: GLOBALFOUNDRIES U.S. Inc.
- Current Assignee: GLOBALFOUNDRIES U.S. Inc.
- Current Assignee Address: US CA Santa Clara
- Main IPC: G02B6/122
- IPC: G02B6/122

Abstract:
Structures and methods implement an enlarged waveguide. The structure may include a semiconductor-on-insulator (SOI) substrate including a semiconductor-on-insulator (SOI) layer over a buried insulator layer over a semiconductor substrate. An inter-level dielectric (ILD) layer is over the SOI substrate. A first waveguide has a lower surface extending at least partially into the buried insulator layer, which allows vertical enlargement of the waveguide, without increasing the thickness of the ILD layer or increasing the length of interconnects to other devices. The enlarged waveguide may include nitride, and can be implemented with other conventional silicon and nitride waveguides.
Public/Granted literature
- US11409037B2 Enlarged waveguide for photonic integrated circuit without impacting interconnect layers Public/Granted day:2022-08-09
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