Invention Application
- Patent Title: EFFICIENT HYBRIDIZATION OF CLASSICAL AND POST-QUANTUM SIGNATURES
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Application No.: US17546335Application Date: 2021-12-09
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Publication No.: US20220131708A1Publication Date: 2022-04-28
- Inventor: Santosh Ghosh , Manoj Sastry , Ki Yoon
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H04L9/32
- IPC: H04L9/32
Abstract:
In one example an apparatus comprises verification circuitry to receive, in a RSA/ECDSA processor, an input message, compute, in the RSA/ECDSA processor, a hash digest (d) for the message, and provide the hash digest as an input to a XMSS/LMS processor. Other examples may be described.
Information query
