Invention Application
- Patent Title: POWER MANAGEMENT FOR A MEMORY DEVICE
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Application No.: US17094579Application Date: 2020-11-10
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Publication No.: US20220147131A1Publication Date: 2022-05-12
- Inventor: James S. Rehmeyer , Gary L. Howe , Miles S. Wiscombe , Eric J. Stave
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: G06F1/3203
- IPC: G06F1/3203 ; G11C11/4074

Abstract:
Methods, systems, and devices for power management for a memory device are described. For example, a memory device may include one or more memory dies and may be configured to operate using a first supply voltage and a second supply voltage. The first supply voltage may be associated with a first defined voltage range, and the second supply voltage may be associated with a second defined voltage range. The memory device may include a power management integrated circuit (PMIC) that is coupled with the one or more memory dies and provides the supply voltages to the one or more memory dies. The PMIC may be configured to provide, to the one or more memory dies, a first voltage that is within the first defined voltage range as the first supply voltage and a second voltage that is outside the second defined voltage range as the second supply voltage.
Public/Granted literature
- US12197264B2 Power management for a memory device Public/Granted day:2025-01-14
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