Invention Application
- Patent Title: RECONFIGURABLE CACHE HIERARCHY FRAMEWORK FOR THE STORAGE OF FPGA BITSTREAMS
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Application No.: US17095109Application Date: 2020-11-11
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Publication No.: US20220147457A1Publication Date: 2022-05-12
- Inventor: Andrea ENRICI , Julien LALLET
- Applicant: Nokia Solutions and Networks Oy
- Applicant Address: FI Espoo
- Assignee: Nokia Solutions and Networks Oy
- Current Assignee: Nokia Solutions and Networks Oy
- Current Assignee Address: FI Espoo
- Main IPC: G06F12/0811
- IPC: G06F12/0811 ; G06F12/0813 ; G06F12/0871 ; G06F12/0804 ; G06F13/16

Abstract:
A network-based apparatus includes at least one processor and at least one memory including computer program code. The at least one memory and the computer program code are configured to, with the at least one processor, cause the network apparatus to configure a cache manager according to a cache management policy identified in a request from a network orchestrator, the cache manager managing a cache of a multi-level cache hierarchy, the cache storing bitstreams for configuring a programmable device.
Public/Granted literature
- US11669452B2 Reconfigurable cache hierarchy framework for the storage of FPGA bitstreams Public/Granted day:2023-06-06
Information query
IPC分类: