Invention Application
- Patent Title: RUGGED LDMOS WITH DRAIN-TIED FIELD PLATE
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Application No.: US17092485Application Date: 2020-11-09
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Publication No.: US20220149186A1Publication Date: 2022-05-12
- Inventor: Henry Litzmann Edwards , Gang Xue
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78 ; H01L29/40 ; H01L29/08 ; H01L21/762

Abstract:
A semiconductor device including a substrate having a semiconductor layer containing a laterally diffused metal oxide semiconductor (LDMOS) transistor, including a body region of a first conductivity type and a drift region of an opposite conductivity type. A gate dielectric layer over a channel region of the body, the gate dielectric extending over a junction between a body region and the drift region with a gate electrode on the gate dielectric and a drain contact in the drain drift region, having the second conductivity type. A field relief dielectric layer on the drain drift region extending from the drain region to the gate dielectric, having a thickness greater than the gate dielectric layer. A drain-tied field plate on the field relief dielectric, the drain-tied field plate extending from the drain region toward the gate with an electrical connection between the drain-tied field plate and the drain region.
Information query
IPC分类: