Invention Application
- Patent Title: PROCESSING SYSTEM WITH SELECTIVE PRIORITY-BASED TWO-LEVEL BINNING
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Application No.: US17231425Application Date: 2021-04-15
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Publication No.: US20220156874A1Publication Date: 2022-05-19
- Inventor: Anirudh R. ACHARYA , Ruijin WU , Young In YEO
- Applicant: ADVANCED MICRO DEVICES, INC.
- Applicant Address: US CA Santa Clara
- Assignee: ADVANCED MICRO DEVICES, INC.
- Current Assignee: ADVANCED MICRO DEVICES, INC.
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06T1/20
- IPC: G06T1/20 ; G06T7/11 ; G06F9/50

Abstract:
Systems and methods related to priority-based and performance-based selection of a render mode, such as a two-level binning mode, in which to execute workloads with a graphics processing unit (GPU) of a system are provided. A user mode driver (UMD) or kernel mode driver (KMD) executed at a central processing unit (CPU) configures low and medium priority workloads to be executed in a two-level binning mode and selects a binning mode for high priority workloads based on whether performance heuristics indicate that one or more binning conditions or override conditions have been met. High priority workloads are maintained in a high priority queue, while low and medium priority workloads are maintained in a low/medium priority queue, such that execution of low and medium priority workloads at the GPU can be preempted in favor of executing high priority workloads.
Public/Granted literature
- US12266030B2 Processing system with selective priority-based two-level binning Public/Granted day:2025-04-01
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