Invention Application
- Patent Title: DEEP TRENCH INTEGRATION PROCESSES AND DEVICES
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Application No.: US16953567Application Date: 2020-11-20
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Publication No.: US20220165610A1Publication Date: 2022-05-26
- Inventor: Lan Yu , Tyler Sherwood , Michael Chudzik , Siddarth Krishnan
- Applicant: Applied Materials, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Applied Materials, Inc.
- Current Assignee: Applied Materials, Inc.
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/762 ; H01L29/06

Abstract:
Exemplary methods of forming a semiconductor device may include etching a trench from a first surface of a semiconductor substrate to a first depth within the semiconductor substrate. The trench may be characterized by a first width through the first depth. The methods may include forming a liner along sidewalls of the trench. The methods may include etching the trench to a second depth at least ten times greater than the first depth. The trench may be characterized by a second width through the second depth. The methods may include filling the trench with a dielectric material. A seam formed in the dielectric material may be maintained below the first depth.
Public/Granted literature
- US11410873B2 Deep trench integration processes and devices Public/Granted day:2022-08-09
Information query
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