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公开(公告)号：US11830824B2
公开(公告)日：2023-11-28
申请号：US17214411
申请日：2021-03-26
发明人： Amirhasan Nourbakhsh , Lan Yu , Joseph F. Salfelder , Ki Cheol Ahn , Tyler Sherwood , Siddarth Krishnan , Michael Jason Fronckowiak , Xing Chen
IPC分类号： H01L23/00 , H01L21/304 , H01L21/308 , H01L21/311
CPC分类号： H01L23/562 , H01L21/304 , H01L21/3086 , H01L21/31111
摘要： Exemplary methods of processing a semiconductor substrate may include forming a layer of dielectric material on the semiconductor substrate. The methods may include performing an edge exclusion removal of the layer of dielectric material. The methods may include forming a mask material on the semiconductor substrate. The mask material may contact the dielectric material at an edge region of the semiconductor substrate. The methods may include patterning an opening in the mask material overlying a first surface of the semiconductor substrate. The methods may include etching one or more trenches through the semiconductor substrate.
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公开(公告)号：US11769665B2
公开(公告)日：2023-09-26
申请号：US17572963
申请日：2022-01-11
发明人： Amirhasan Nourbakhsh , Raman Gaire , Tyler Sherwood , Lan Yu , Roger Quon , Siddarth Krishnan
IPC分类号： H01L21/02
CPC分类号： H01L21/02576 , H01L21/02532 , H01L21/02579
摘要： Exemplary semiconductor processing methods may include forming a p-type silicon-containing material on a substrate including a first n-type silicon-containing material defining one or more features. The p-type silicon-containing material may extend along at least a portion of the one or more features defined in the first n-type silicon-containing material. The methods may include removing a portion of the p-type silicon-containing material. The portion of the p-type silicon-containing material may be removed from a bottom of the one or more features. The methods may include providing a silicon-containing material. The methods may include depositing a second n-type silicon-containing material on the substrate. The second n-type silicon-containing material may fill the one or more features formed in the first n-type silicon-containing material and may separate regions of remaining p-type silicon-containing material.
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公开(公告)号：US11456171B2
公开(公告)日：2022-09-27
申请号：US16953577
申请日：2020-11-20
发明人： Lan Yu , Tyler Sherwood
IPC分类号： H01L21/02 , H01L29/06 , H01L21/762
摘要： Exemplary methods of forming a semiconductor structure may include forming a liner along sidewalls of a trench defined from a first surface of a semiconductor substrate. The liner may extend along the first surface of the semiconductor substrate. The methods may include filling the trench with a dielectric material. The methods may include removing the dielectric material and the liner from the first surface of the semiconductor substrate. The methods may include forming a layer of the liner across the first surface of the semiconductor substrate and the trench defined within the semiconductor substrate.
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公开(公告)号：US20240154018A1
公开(公告)日：2024-05-09
申请号：US18411693
申请日：2024-01-12
发明人： Ria Someshwar , Seshadri Ganguli , Lan Yu , Siddarth Krishnan , Srinivas Gandikota , Jacqueline S. Wrench , Yixiong Yang
IPC分类号： H01L29/45 , H01L21/285 , H01L21/324 , H01L21/8238 , H01L29/40 , H01L29/66
CPC分类号： H01L29/456 , H01L21/28518 , H01L21/324 , H01L21/823814 , H01L29/401 , H01L29/45 , H01L29/665
摘要： Methods for forming a semiconductor structure and semiconductor structures are described. The method comprises patterning a substrate to form a first opening and a second opening, the substrate comprising an n transistor and a p transistor, the first opening over the n transistor and the second opening over the p transistor; pre-cleaning the substrate; depositing a titanium silicide (TiSi) layer on the n transistor and on the p transistor by plasma-enhanced chemical vapor deposition (PECVD); optionally depositing a first barrier layer on the titanium silicide (TiSi) layer and selectively removing the first barrier layer from the p transistor; selectively forming a molybdenum silicide (MoSi) layer on the titanium silicide (TiSi) layer on the n transistor and the p transistor; forming a second barrier layer on the molybdenum silicide (MoSi) layer; and annealing the semiconductor structure. The method may be performed in a processing chamber without breaking vacuum.
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公开(公告)号：US11908678B2
公开(公告)日：2024-02-20
申请号：US17149399
申请日：2021-01-14
IPC分类号： H01L21/02 , H01L21/4757
CPC分类号： H01L21/02024 , H01L21/02019 , H01L21/47573
摘要： Processing methods may be performed to form a filled contact hole in a mirror layer of a semiconductor substrate. The method may include forming a contact hole through a mirror layer of the semiconductor substrate by an etch process. The method may include filling the contact hole with a fill material. A portion of the fill material may overlie the mirror layer. The method may also include removing a portion of the fill material external to the contact hole by chemical mechanical polishing landing on the mirror layer.
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公开(公告)号：US11605741B2
公开(公告)日：2023-03-14
申请号：US17102148
申请日：2020-11-23
发明人： Joshua S. Holt , Lan Yu , Tyler Sherwood , Archana Kumar , Nicolas Louis Gabriel Breil , Siddarth Krishnan
IPC分类号： H01L29/872 , H01L21/28 , H01L29/45 , H01L29/861 , H01L29/66 , H01L29/47
摘要： Exemplary methods of forming a semiconductor structure may include forming a layer of metal on a semiconductor substrate. The layer of metal may extend along a first surface of the semiconductor substrate. The semiconductor substrate may be or include silicon. The methods may include performing an anneal to produce a metal silicide. The methods may include implanting ions in the metal silicide to increase a barrier height over 0.65 V.
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公开(公告)号：US11586067B2
公开(公告)日：2023-02-21
申请号：US17100407
申请日：2020-11-20
发明人： Lan Yu , Benjamin D. Briggs , Tyler Sherwood , Raghav Sreenivasan
IPC分类号： G02F1/1335 , G02F1/1362
摘要： Processing methods may be performed to form a pixel material in a semiconductor substrate. The methods may include forming a lithographic mask overlying the semiconductor substrate. The lithographic mask may include a window. The method may include forming a via in the semiconductor substrate by a dry etch process through the window. The method may also include forming the pixel material by depositing a fill material in the via.
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公开(公告)号：US20220310531A1
公开(公告)日：2022-09-29
申请号：US17214411
申请日：2021-03-26
发明人： Amirhasan Nourbakhsh , Lan Yu , Joseph F. Salfelder , Ki Cheol Ahn , Tyler Sherwood , Siddarth Krishnan , Michael Jason Fronckowiak , Xing Chen
IPC分类号： H01L23/00 , H01L21/311 , H01L21/308 , H01L21/304
摘要： Exemplary methods of processing a semiconductor substrate may include forming a layer of dielectric material on the semiconductor substrate. The methods may include performing an edge exclusion removal of the layer of dielectric material. The methods may include forming a mask material on the semiconductor substrate. The mask material may contact the dielectric material at an edge region of the semiconductor substrate. The methods may include patterning an opening in the mask material overlying a first surface of the semiconductor substrate. The methods may include etching one or more trenches through the semiconductor substrate.
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公开(公告)号：US20220223402A1
公开(公告)日：2022-07-14
申请号：US17149399
申请日：2021-01-14
IPC分类号： H01L21/02 , H01L21/4757
摘要： Processing methods may be performed to form a filled contact hole in a mirror layer of a semiconductor substrate. The method may include forming a contact hole through a mirror layer of the semiconductor substrate by an etch process. The method may include filling the contact hole with a fill material. A portion of the fill material may overlie the mirror layer. The method may also include removing a portion of the fill material external to the contact hole by chemical mechanical polishing landing on the mirror layer.
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公开(公告)号：US20220165574A1
公开(公告)日：2022-05-26
申请号：US17102148
申请日：2020-11-23
发明人： Joshua S. Holt , Lan Yu , Tyler Sherwood , Archana Kumar , Nicolas Louis Gabriel Breil , Siddarth Krishnan
IPC分类号： H01L21/28 , H01L29/66 , H01L29/861 , H01L29/45
摘要： Exemplary methods of forming a semiconductor structure may include forming a layer of metal on a semiconductor substrate. The layer of metal may extend along a first surface of the semiconductor substrate. The semiconductor substrate may be or include silicon. The methods may include performing an anneal to produce a metal silicide. The methods may include implanting ions in the metal silicide to increase a barrier height over 0.65 V.
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