An electronic device includes a clock management unit configured to generate a clock signal, an intellectual property (IP) device configured to receive the clock signal and is configured to perform a task according to the clock signal in an active state, a first counter configured to count cycles of the clock signal while the IP device is in the active state, and is configured to generate a first count, and a frequency controller configured to control the clock management unit to change a frequency of the clock signal when the first count reaches a first reference count.