Invention Application
- Patent Title: 3-DIMENSIONAL NOR MEMORY ARRAY ARCHITECTURE AND METHODS FOR FABRICATION THEREOF
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Application No.: US17690943Application Date: 2022-03-09
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Publication No.: US20220199643A1Publication Date: 2022-06-23
- Inventor: Eli Harari , Scott Brad Herner , Wu-Yi Henry Chien
- Applicant: SunRise Memory Corporation
- Applicant Address: US CA San Jose
- Assignee: SunRise Memory Corporation
- Current Assignee: SunRise Memory Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; H01L21/768 ; H01L23/00 ; H01L27/11578

Abstract:
A method addresses low cost, low resistance metal interconnects and mechanical stability in a high aspect ratio structure. According to the various implementations disclosed herein, a replacement metal process, which defers the need for a metal etching step in the fabrication process until after all patterned photoresist is no longer present. Under this process, the conductive sublayers may be both thick and numerous. The present invention also provides for a strut structure which facilitates etching steps on high aspect ratio structures, which enhances mechanical stability in a high aspect ratio memory stack.
Public/Granted literature
- US11729980B2 3-dimensional NOR memory array architecture and methods for fabrication thereof Public/Granted day:2023-08-15
Information query
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