Invention Application
- Patent Title: STACKED SEMICONDUCTOR DIES FOR SEMICONDUCTOR DEVICE ASSEMBLIES
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Application No.: US17741799Application Date: 2022-05-11
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Publication No.: US20220271013A1Publication Date: 2022-08-25
- Inventor: Yeongbeom Ko , Youngik Kwon , Jong Sik Paek , Jungbae Lee
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/538 ; H01L23/31 ; H01L23/00 ; H01L21/768 ; H01L21/56

Abstract:
Stacked semiconductor dies for semiconductor device assemblies and associated methods and systems are disclosed. In some embodiments, the semiconductor die assembly includes a substrate with a first opening in an inner portion and a second opening in an outer portion of the substrate. Further, the semiconductor die assembly can include a master die attached to a front side of the substrate, where the master die includes a first bond pad proximate to the first opening and a second bond pad proximate to the second opening. The first and second bond pads of the master die can be coupled with first and second substrate bond pads on a back side of the substrate, opposite to the front side, using first and second bonding wires extending through the first and second openings, respectively.
Public/Granted literature
- US11942455B2 Stacked semiconductor dies for semiconductor device assemblies Public/Granted day:2024-03-26
Information query
IPC分类: