Invention Application
- Patent Title: METHOD OF USING VARAINDUCTOR HAVING GROUND AND FLOATING PLANES
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Application No.: US17751005Application Date: 2022-05-23
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Publication No.: US20220286087A1Publication Date: 2022-09-08
- Inventor: Yi-Hsuan LIU , Hsieh-Hung HSIEH , Chewn-Pu JOU , Fu-Lung HSUEH
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Main IPC: H03B5/12
- IPC: H03B5/12

Abstract:
A method using a phase locked loop (PLL) includes receiving a reference frequency. The method further includes generating a control signal based on the reference frequency. The method further includes adjusting an output signal based on the control signal. Adjusting the output signal includes operating a plurality of switches in response to the control signal, wherein operating the plurality of switches comprises selectively electrically connecting a first ground plane to a first floating plane, wherein the first floating plane is between the first ground plane and the signal line, and the first floating plane is a same distance from a substrate as the first ground plane.
Public/Granted literature
- US11711056B2 Method of using varainductor having ground and floating planes Public/Granted day:2023-07-25
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