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    VARAINDUCTOR, VOLTAGE CONTROLLED OSCILLATOR INCLUDING THE VARAINDUCTOR, AND PHASE LOCKED LOOP INCLUDING THE VARAINDUCTOR
    1.
    发明申请
    VARAINDUCTOR, VOLTAGE CONTROLLED OSCILLATOR INCLUDING THE VARAINDUCTOR, AND PHASE LOCKED LOOP INCLUDING THE VARAINDUCTOR 有权
    变频器，包括变频器的电压控制振荡器和包括变频器的相位锁定环路

    公开(公告)号：US20140266344A1

    公开(公告)日：2014-09-18

    申请号：US13837184

    申请日：2013-03-15

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Yi-Hsuan LIU ,  Hsieh-Hung HSIEH ,  Chewn-Pu JOU ,  Fu-Lung HSUEH

    IPC: H01F29/00

    CPC classification number: H03B5/1256 ,  H01F2021/125 ,  H03B5/1212 ,  H03B5/1228 ,  H03B2201/0216 ,  H03J3/20 ,  H03J3/22

    Abstract: A varainductor including a signal line disposed over a substrate. The varainductor further includes a first ground plane over the substrate, the first ground plane disposed on a first side of the signal line, and a second ground plane over the substrate, the second ground plane disposed on a second side of the signal line opposite the first side of the signal line. The varainductor further includes a first floating plane over the substrate, the first floating plane disposed between the first ground plane and the signal line, and a second floating plane over the substrate, the second floating plane disposed between the second ground plane and the signal line. The varainductor further includes an array of switches, the array of switches is configured to selectively connect the first ground plane to the first floating plane, and to selectively connect the second ground plane to the second floating plane.

    Abstract translation: 包括设置在基板上的信号线的变容器。 所述变压器还包括在所述衬底上的第一接地平面，所述第一接地平面设置在所述信号线的第一侧上，以及在所述衬底上的第二接地平面，所述第二接地平面设置在与所述信号线相对的所述信号线的第二侧上 信号线的第一侧。 所述变容器还包括在所述衬底上的第一浮动平面，所述第一浮动平面设置在所述第一接地平面和所述信号线之间，以及在所述衬底上方的第二浮动平面，所述第二浮动平面设置在所述第二接地平面和所述信号线之间 。 变容器还包括开关阵列，开关阵列被配置为选择性地将第一接地平面连接到第一浮动平面，并且选择性地将第二接地平面连接到第二浮动平面。

    METHOD OF USING VARAINDUCTOR HAVING GROUND AND FLOATING PLANES
    4.
    发明申请
    METHOD OF USING VARAINDUCTOR HAVING GROUND AND FLOATING PLANES 有权

    公开(公告)号：US20220286087A1

    公开(公告)日：2022-09-08

    申请号：US17751005

    申请日：2022-05-23

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    Inventor： Yi-Hsuan LIU ,  Hsieh-Hung HSIEH ,  Chewn-Pu JOU ,  Fu-Lung HSUEH

    IPC: H03B5/12

    Abstract: A method using a phase locked loop (PLL) includes receiving a reference frequency. The method further includes generating a control signal based on the reference frequency. The method further includes adjusting an output signal based on the control signal. Adjusting the output signal includes operating a plurality of switches in response to the control signal, wherein operating the plurality of switches comprises selectively electrically connecting a first ground plane to a first floating plane, wherein the first floating plane is between the first ground plane and the signal line, and the first floating plane is a same distance from a substrate as the first ground plane.

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