A BD type pulse width modulation (PWM) circuit is configured to convert a pair of complementary input signals to a pair of output PWM signals. The BD PWM circuit modulates a basic modulation signal according to the pair of input signals, to generate a basic PWM signal. The common mode levels of the pair of input signals and the basic modulation signal are the same. The BD PWM circuit modulates an offset modulation signal according to the pair of input signals to generate an offset PWM signal. The offset modulation signal and the basic modulation signal have a non-zero offset in between. The BD PWM circuit selects the offset PWM signal or a heavy load PWM signal as the pair of output PWM signals. The heavy load PWM signal is correlated with the basic PWM signal.