HIGH-SPEED DIGITAL SIGNAL DRIVER WITH LOW POWER CONSUMPTION
Abstract:
The present disclosure provides an inverter driver circuit including: an input configured to receive an input signal; an output configured to provide an output signal; a parallel circuit between the input and the output, wherein the parallel circuit includes a first circuit path parallel to a second circuit path between the input and the output, wherein the first circuit path includes an output sustaining circuit and the second circuit path includes an output driving circuit; and an inverting delay circuit coupled to the output of the inverter driver circuit and coupled to the output driving circuit, wherein the inverting delay circuit is configured to provide a control signal to the output driving circuit, wherein the control signal is a delayed and inverted version of the output signal.
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