Invention Application
- Patent Title: MANAGING ERROR CORRECTION CODING IN MEMORY SYSTEMS
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Application No.: US17223545Application Date: 2021-04-06
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Publication No.: US20220318090A1Publication Date: 2022-10-06
- Inventor: Kuan-Chieh Wang , Shih-Chou Juan
- Applicant: Macronix International Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Macronix International Co., Ltd.
- Current Assignee: Macronix International Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G06F13/16 ; H03M13/45

Abstract:
Methods, devices, systems, and apparatus including computer-readable mediums for managing error correction coding in memory systems are provided. In one aspect, a memory system includes a system controller configured to communicate with a host device, and a memory device coupled to the system controller. The memory device includes at least one memory and a memory controller coupled to the at least one memory. The memory controller includes an error correction code (ECC) circuit configured to perform error correction coding for data received from at least one of the system controller or the at least one memory.
Public/Granted literature
- US11556420B2 Managing error correction coding in memory systems Public/Granted day:2023-01-17
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