Invention Application
- Patent Title: LOGICAL-TO-PHYSICAL MAPPING
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Application No.: US17859963Application Date: 2022-07-07
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Publication No.: US20220342829A1Publication Date: 2022-10-27
- Inventor: Xiangang Luo , Jianmin Huang
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: G06F12/1009
- IPC: G06F12/1009 ; G06F11/10

Abstract:
A logical to physical (L2P) mapping component can determine whether an offset between a physical page address (PPA) and a logical block address (LBA) will be altered in response to writing data corresponding to the PPA and comprising at least one redundant array of independent NAND parity bit to a first level of a logical to physical (L2P) data structure or a second level of the L2P data structure, or both. The L2P mapping component can further cause an indication comprising at least two bits corresponding to the offset to be written to the first level of the L2P data structure or the second level of the L2P data structure, or both.
Public/Granted literature
- US11636044B2 Logical-to-physical mapping Public/Granted day:2023-04-25
Information query
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