- 专利标题： PASSIVATION LAYER FOR EPITAXIAL SEMICONDUCTOR PROCESS
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申请号： US17869885申请日： 2022-07-21
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公开(公告)号： US20220367638A1公开(公告)日： 2022-11-17
- 发明人: Yin-Kai Liao , Sin-Yi Jiang , Hsiang-Lin Chen , Yi-Shin Chu , Po-Chun Liu , Kuan-Chieh Huang , Jyh-Ming Hung , Jen-Cheng Liu
- 申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW Hsin-Chu
- 主分类号： H01L29/10
- IPC分类号： H01L29/10 ; H01L29/49 ; H01L29/167 ; H01L29/66
摘要：
The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material. The second semiconductor material is a group IV semiconductor or a group III-V compound semiconductor. A passivation layer is disposed on the second semiconductor material. The passivation layer includes the first semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material.
公开/授权文献
- US11908900B2 Passivation layer for epitaxial semiconductor process 公开/授权日：2024-02-20
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