-
公开(公告)号:US20240136401A1
公开(公告)日:2024-04-25
申请号:US18405099
申请日:2024-01-05
发明人: Yin-Kai Liao , Sin-Yi Jiang , Hsiang-Lin Chen , Yi-Shin Chu , Po-Chun Liu , Kuan-Chieh Huang , Jyh-Ming Hung , Jen-Cheng Liu
IPC分类号: H01L29/10 , H01L29/167 , H01L29/49 , H01L29/66
CPC分类号: H01L29/1087 , H01L29/167 , H01L29/4933 , H01L29/6659
摘要: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material and a passivation layer is disposed on the second semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material. A silicide is arranged within the passivation layer and along tops of the first doped region and the second doped region.
-
公开(公告)号:US20220367638A1
公开(公告)日:2022-11-17
申请号:US17869885
申请日:2022-07-21
发明人: Yin-Kai Liao , Sin-Yi Jiang , Hsiang-Lin Chen , Yi-Shin Chu , Po-Chun Liu , Kuan-Chieh Huang , Jyh-Ming Hung , Jen-Cheng Liu
IPC分类号: H01L29/10 , H01L29/49 , H01L29/167 , H01L29/66
摘要: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material. The second semiconductor material is a group IV semiconductor or a group III-V compound semiconductor. A passivation layer is disposed on the second semiconductor material. The passivation layer includes the first semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material.
-
公开(公告)号:US11908900B2
公开(公告)日:2024-02-20
申请号:US17869885
申请日:2022-07-21
发明人: Yin-Kai Liao , Sin-Yi Jiang , Hsiang-Lin Chen , Yi-Shin Chu , Po-Chun Liu , Kuan-Chieh Huang , Jyh-Ming Hung , Jen-Cheng Liu
IPC分类号: H01L29/10 , H01L29/167 , H01L29/49 , H01L29/66
CPC分类号: H01L29/1087 , H01L29/167 , H01L29/4933 , H01L29/6659
摘要: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material. The second semiconductor material is a group IV semiconductor or a group III-V compound semiconductor. A passivation layer is disposed on the second semiconductor material. The passivation layer includes the first semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material.
-
-