SYNCHRONOUS SERIAL INTERFACE ALLOWING COMMUNICATION WITH MULTIPLE PERIPHERAL DEVICES USING A SINGLE CHIP SELECT
Abstract:
A synchronous serial bus peripheral circuit includes a peripheral identification (ID) register and a state machine circuit. The state machine circuit is coupled to the peripheral ID register, and is configured to transmit a status value based on a peripheral ID field of data received via the receiver shift register equaling a value stored in the peripheral ID register.
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