Invention Publication
- Patent Title: Method and Structure for FinFET Isolation
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Application No.: US18157352Application Date: 2023-01-20
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Publication No.: US20230154800A1Publication Date: 2023-05-18
- Inventor: Che-Cheng Chang , Chih-Han Lin , Jr-Jung Lin
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- The original application number of the division: US14579728 2014.12.22
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L29/66 ; H01L27/088 ; H01L29/78

Abstract:
A semiconductor device includes a substrate, a fin protruding from the substrate, and a gate stack over the substrate and engaging the fin. The fin having a first end and a second end. The semiconductor device also includes a dielectric layer abutting the first end of the fin and spacer features disposed on sidewalls of the gate stack and on a top surface of the dielectric layer.
Public/Granted literature
- US12125751B2 Method and structure for FinFET isolation Public/Granted day:2024-10-22
Information query
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