Invention Publication
- Patent Title: SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND JIG SET
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Application No.: US17954215Application Date: 2022-09-27
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Publication No.: US20230154889A1Publication Date: 2023-05-18
- Inventor: Manabu ISHIKAWA
- Applicant: FUJI ELECTRIC CO., LTD.
- Applicant Address: JP Kawasaki-shi
- Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee Address: JP Kawasaki-shi
- Priority: JP 21186925 2021.11.17
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L25/07 ; H01L21/48 ; H01L23/373

Abstract:
A semiconductor device manufacturing method, includes: a preparing process for preparing a conductive plate, a semiconductor chip arranged over the conductive plate with a first bonding material therebetween, and a connection terminal including a bonding portion arranged over the semiconductor chip with a second bonding material therebetween; a first jig arrangement process for arranging a first guide jig, through which a first guide hole pierces, over the conductive plate, such that the first guide hole corresponds to the bonding portion in a plan view of the semiconductor device; and a first pressing process for inserting a pillar-shaped pressing jig, which includes a pressing portion at a lower end portion thereof, into the first guide hole, and pressing the bonding portion of the connection terminal to a side of the conductive plate with the pressing portion.
Information query
IPC分类: