- 专利标题: Integrated Circuits With Contacting Gate Structures
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申请号: US18151624申请日: 2023-01-09
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公开(公告)号: US20230164969A1公开(公告)日: 2023-05-25
- 发明人: Jhon Jhy Liaw
- 申请人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 分案原申请号: US15981004 2018.05.16
- 主分类号: H10B10/00
- IPC分类号: H10B10/00 ; H01L29/66 ; H01L29/78 ; H01L29/417
摘要:
Examples of an integrated circuit with a contacting gate structure and a method for forming the integrated circuit are provided herein. In some examples, an integrated circuit device includes a memory cell that includes a plurality of fins and a gate extending over a first fin of the plurality of fins and a second fin of the plurality of fins. The gate includes a gate electrode that physically contacts the first fin and a gate dielectric disposed between the gate electrode and the second fin. In some such examples, the first fin includes a source/drain region and a doped region that physically contacts the gate electrode.
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