Invention Publication
- Patent Title: DYNAMIC PRIORITIZATION OF SELECTOR VT SCANS
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Application No.: US17733460Application Date: 2022-04-29
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Publication No.: US20230195355A1Publication Date: 2023-06-22
- Inventor: Pitamber Shukla , Avinash Rajagiri , Devin Batutis
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
Prioritization of VT scans can be performed using particular select gates of a memory device or memory sub-system in the absence of performing such select gate scan operations on all of the select gates of an entire memory die or of all the memory dice of a memory device or memory sub-system. A method for such prioritization of VT scans includes determining quality characteristics of a memory die and altering a threshold voltage applied to the memory die in performance of a select gate scan operation based, at least in part, on the determined quality characteristics of the memory die. Such methods can further include performing the select gate scan operation by applying signaling having the altered threshold voltage to a select gate of the memory die.
Public/Granted literature
- US12106813B2 Dynamic prioritization of selector V Public/Granted day:2024-10-01
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