Invention Publication
- Patent Title: MONOLITHIC INTEGRATION OF HIGH AND LOW-SIDE GAN FETS WITH SCREENING BACK GATING EFFECT
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Application No.: US17559635Application Date: 2021-12-22
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Publication No.: US20230197784A1Publication Date: 2023-06-22
- Inventor: Dong Seup Lee , Qhalid Fareed , Sridhar Seetharaman , Jungwoo Joh , Chang Soo Suh
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Main IPC: H01L29/08
- IPC: H01L29/08 ; H01L29/20 ; H01L29/06
Abstract:
An electronic device includes an one of aluminum gallium nitride, aluminum nitride, indium aluminum nitride, or indium aluminum gallium nitride back barrier layer over a buffer structure, a gallium nitride layer over the back barrier layer, a hetero-epitaxy structure over the gallium nitride layer, first and second transistors over the hetero-epitaxy structure, and a hole injector having a doped gallium nitride structure over the hetero-epitaxy structure and a conductive structure partially over the doped gallium nitride structure to inject holes to form a hole layer proximate an interface of the back barrier layer and the buffer structure to mitigate vertical electric field back gating effects for the first transistor.
Public/Granted literature
- US11888027B2 Monolithic integration of high and low-side GaN FETs with screening back gating effect Public/Granted day:2024-01-30
Information query
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