Invention Publication
- Patent Title: System and Method for Aligned Stitching
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Application No.: US18310743Application Date: 2023-05-02
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Publication No.: US20230268285A1Publication Date: 2023-08-24
- Inventor: Chih-Chia Hu , Chang-Ching Yu , Ming-Fa Chen
- Applicant: Taiwan Semiconductor Manufacturing, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing, Ltd.
- Current Assignee Address: TW Hsinchu
- The original application number of the division: US15907945 2018.02.28
- Main IPC: H01L23/544
- IPC: H01L23/544 ; H01L21/56 ; G03F9/00 ; G03F7/00 ; G03F1/00 ; G03F1/42

Abstract:
A method for manufacturing semiconductor devices include steps of depositing a first photoresist over a first dielectric layer, first exposing the first photoresist to a first light-exposure using a first lithographic mask, and second exposing the first photoresist to a second light-exposure using a second lithographic mask. An overlap region of the first photoresist is exposed to both the first light-exposure and the second light-exposure. The first dielectric layer is thereafter patterned to form a mask overlay alignment mark in the overlap region. The patterning includes etching the first dielectric layer form a trench, and filling the trench with a conductive material to produce the alignment mark. A second dielectric layer is deposited over the alignment mark, and a second photoresist is deposited over the second dielectric layer. A third lithographic mask is aligned to the second photoresist using the underlying mask overlay alignment mark for registration.
Public/Granted literature
- US12154862B2 System and method for aligned stitching Public/Granted day:2024-11-26
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