- 专利标题: SEMICONDUCTOR PACKAGE HAVING A THICK LOGIC DIE
-
申请号: US18106499申请日: 2023-02-07
-
公开(公告)号: US20230282604A1公开(公告)日: 2023-09-07
- 发明人: Ta-Jen Yu , Tai-Yu Chen , Shih-Chin Lin , Isabella Song , Wen-Chin Tsai
- 申请人: MEDIATEK INC.
- 申请人地址: TW Hsin-chu
- 专利权人: MEDIATEK INC.
- 当前专利权人: MEDIATEK INC.
- 当前专利权人地址: TW Hsin-Chu
- 主分类号: H01L23/00
- IPC分类号: H01L23/00 ; H01L25/16 ; H10B80/00 ; H01L23/498 ; H01L23/31 ; H01L23/29
摘要:
A semiconductor package includes a bottom substrate and a top substrate space apart from the bottom substrate such that the bottom substrate and the top substrate define a gap therebetween. A logic die is mounted on a top surface of the bottom substrate in a flip-chip fashion. The logic die has a thickness of 125-350 micrometers. The logic die comprises an active front side, a passive rear side, and an input/output pad provided on the active front side. A plurality of copper cored solder balls is disposed between the bottom substrate and the top substrate around the logic die to electrically connect the bottom substrate with the top substrate. A sealing resin fills in the gap between the bottom substrate and the top substrate and seals the logic die and the plurality of copper cored solder balls in the gap.
信息查询
IPC分类: