- 专利标题: COMPARATOR SYSTEMS AND METHODS
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申请号: US18157977申请日: 2023-01-23
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公开(公告)号: US20230283271A1公开(公告)日: 2023-09-07
- 发明人: Antonino Conte , Marco Ruta , Michelangelo Pisasale , Agatino Massimo Maccarrone , Francesco Tomaiuolo
- 申请人: STMicroelectronics S.r.l.
- 申请人地址: IT Agrate Brianza (MB)
- 专利权人: STMicroelectronics S.r.l.
- 当前专利权人: STMicroelectronics S.r.l.
- 当前专利权人地址: IT Agrate Brianza (MB)
- 优先权: IT 2022000001553 2022.01.31
- 主分类号: H03K5/24
- IPC分类号: H03K5/24 ; H03K3/03
摘要:
A system a ring oscillator configured to produce a set of clock signals having the same clock period and a mutual time delay between respective clock signal edges. Comparator circuits are coupled to first and second input nodes and produce a set of comparison signals according to a respective sequence of comparison phases. A set of synchronization circuits is coupled to the ring oscillator and to the plurality of comparator circuits. The synchronization circuits allot, to each one of the comparator circuits, respective time windows for communication over respective communication lines of the comparison signals. The respective time windows are synchronized based on the clock signals. A multiplexer couples the respective communication lines to an output line to sequentially enable each of the comparator circuits to sequentially output respective comparison signals over the output line for the respective time windows thereby forming a composite comparison signal evolving over time.
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