- 专利标题: PARTIAL BLOCK HANDLING IN A NON-VOLATILE MEMORY DEVICE
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申请号: US17739741申请日: 2022-05-09
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公开(公告)号: US20230360704A1公开(公告)日: 2023-11-09
- 发明人: Zhongguang Xu , Nicola Ciocchini , Zhenlei Shen , Charles See Yeung Kwong , Murong Lang , Ugo Russo , Niccolo' Righetti
- 申请人: Micron Technology, Inc.
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 主分类号: G11C16/10
- IPC分类号: G11C16/10 ; G11C16/08 ; G11C16/26 ; G11C16/34
摘要:
A processing device in a memory sub-system initiates a partial block handling protocol for a closed block of a memory device, the block comprising a plurality of wordlines. The processing device further sends a first programming command to the memory device to program one or more wordlines of the block with first padding data having a first data pattern, wherein the one or more wordlines are adjacent to a last wordline of the block programmed before the block was closed. In addition, the processing device sends a second programming command to the memory device to program all of a set of remaining wordlines of the block with second padding data having a second data pattern comprising fewer bits of data per cell than the first data pattern.
公开/授权文献
- US11901014B2 Partial block handling in a non-volatile memory device 公开/授权日:2024-02-13
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