Invention Publication
- Patent Title: REDUCING PROGRAMMING DISTURBANCE IN MEMORY DEVICES
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Application No.: US18195181Application Date: 2023-05-09
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Publication No.: US20230360710A1Publication Date: 2023-11-09
- Inventor: Aaron Yip
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: G11C16/24
- IPC: G11C16/24 ; G11C16/34 ; G11C16/10 ; G11C16/04

Abstract:
Apparatus and methods are disclosed, such as a method that includes precharging channel material of a string of memory cells in an unselected sub-block of a block of memory cells to a precharge voltage during a first portion of a programming operation. A programming voltage can then be applied to a selected memory cell in a selected sub-block of the block of memory cells during a second portion of the programming operation. The selected memory cell is coupled to a same access line as an unselected memory cell in the unselected sub-block. Additional methods and apparatus are disclosed.
Public/Granted literature
- US12080360B2 Reducing programming disturbance in memory devices Public/Granted day:2024-09-03
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