- 专利标题: METHODS AND SYSTEMS FOR IMPROVING SURFACE MOUNT JOINDER
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申请号: US17851097申请日: 2022-06-28
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公开(公告)号: US20230422403A1公开(公告)日: 2023-12-28
- 发明人: Hsien-Wen Liu , Shih-Ting Hung , Jyun-Lin Wu , Yao-Chun Chuang , Yinlung Lu
- 申请人: Taiwan Semiconductor Manufacturing Company
- 申请人地址: TW Hsinchu
- 专利权人: Taiwan Semiconductor Manufacturing Company
- 当前专利权人: Taiwan Semiconductor Manufacturing Company
- 当前专利权人地址: TW Hsinchu
- 主分类号: H05K3/22
- IPC分类号: H05K3/22 ; H05K3/34 ; H05K1/18 ; B23K1/00
摘要:
Methods for improving joinder between a surface-mount package and a printed circuit board are disclosed. The warpage at a corner of the surface-mount package and at a corresponding corner of a joint area on the printed circuit board are measured to determine the degree of mismatch. A mini-pad is applied to the corner between the surface-mount package and the joint area on the printed circuit board. The thickness of the mini-pad pushes against the surface-mount package and the printed circuit board, reducing the degree of mismatch below a critical dimension of a ball grid array of the surface-mount package. The surface-mount package can then be soldered to the joint area, reducing or preventing the formation of solder bridges and short circuits.
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