A power semiconductor module arrangement includes at least one substrate comprising a dielectric insulation layer and a first metallization layer attached to the dielectric insulation layer; at least one semiconductor body arranged on the first metallization layer; a housing at least partly enclosing the substrate, the housing comprising sidewalls; and at least one press-on pin, wherein each press-on pin is arranged either on the substrate or on one of the at least one semiconductor body and extends from the substrate or the respective semiconductor body in a vertical direction that is perpendicular to a top surface of the substrate, and each press-on pin is mechanically coupled to at least one sidewall of the housing by means of a bar, each bar extending horizontally between the respective press-on pin and sidewall, and parallel to the top surface of the substrate.