POWER SEMICONDUCTOR MODULE AND A METHOD FOR PRODUCING A POWER SEMICONDUCTOR MODULE

    公开(公告)号:US20210358820A1

    公开(公告)日:2021-11-18

    申请号:US17319131

    申请日:2021-05-13

    Inventor: Marco Ludwig

    Abstract: A power semiconductor module includes: at least one semiconductor substrate having a dielectric insulation layer and a first metallization layer attached to the dielectric insulation layer; at least one semiconductor body arranged on the first metallization layer; at least one end stop element arranged either on the semiconductor substrate or on one of the at least one semiconductor body and extending from the semiconductor substrate or the respective semiconductor body in a vertical direction that is perpendicular to a top surface of the semiconductor substrate; and a housing at least partly enclosing the semiconductor substrate, the housing including sidewalls and a cover. The housing further includes at least one press-on pin extending from the cover of the housing towards one of the at least one end stop element, and exerting a pressure on the respective end stop element.

    HOUSING FOR A POWER SEMICONDUCTOR MODULE ARRANGEMENT

    公开(公告)号:US20230180400A1

    公开(公告)日:2023-06-08

    申请号:US18070849

    申请日:2022-11-29

    CPC classification number: H05K5/0026 H05K5/0247 H01L25/072

    Abstract: An arrangement includes a housing and a printed circuit board (PCB) arranged vertically above the housing. The housing includes: at least one protrusion attached to sidewalls and arranged on an outside of the housing at a lower end with at least one first through hole provided in the protrusion; holding devices each arranged inside a first through hole and/or between the PCB and the first through hole; and fastening elements configured to attach the housing to a heat sink or base plate. Each holding device is configured to clamp a corresponding fastening element such that the fastening elements are secured in defined positions, and to align each fastening element with a different first through hole. The PCB includes second through holes each arranged vertically above and aligned with a different fastening element. A diameter of each second through hole is less than the largest diameter of the respective fastening element.

    Power Semiconductor Modules
    6.
    发明申请

    公开(公告)号:US20230077384A1

    公开(公告)日:2023-03-16

    申请号:US17942317

    申请日:2022-09-12

    Abstract: A power semiconductor module arrangement includes at least one substrate comprising a dielectric insulation layer and a first metallization layer attached to the dielectric insulation layer; at least one semiconductor body arranged on the first metallization layer; a housing at least partly enclosing the substrate, the housing comprising sidewalls; and at least one press-on pin, wherein each press-on pin is arranged either on the substrate or on one of the at least one semiconductor body and extends from the substrate or the respective semiconductor body in a vertical direction that is perpendicular to a top surface of the substrate, and each press-on pin is mechanically coupled to at least one sidewall of the housing by means of a bar, each bar extending horizontally between the respective press-on pin and sidewall, and parallel to the top surface of the substrate.

    Power semiconductor module and a method for producing a power semiconductor module

    公开(公告)号:US11581230B2

    公开(公告)日:2023-02-14

    申请号:US17319131

    申请日:2021-05-13

    Inventor: Marco Ludwig

    Abstract: A power semiconductor module includes: at least one semiconductor substrate having a dielectric insulation layer and a first metallization layer attached to the dielectric insulation layer; at least one semiconductor body arranged on the first metallization layer; at least one end stop element arranged either on the semiconductor substrate or on one of the at least one semiconductor body and extending from the semiconductor substrate or the respective semiconductor body in a vertical direction that is perpendicular to a top surface of the semiconductor substrate; and a housing at least partly enclosing the semiconductor substrate, the housing including sidewalls and a cover. The housing further includes at least one press-on pin extending from the cover of the housing towards one of the at least one end stop element, and exerting a pressure on the respective end stop element.

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