发明申请
- 专利标题： TESTBENCHES FOR ELECTRONIC SYSTEMS WITH AUTOMATIC INSERTION OF VERIFICATION FEATURES
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申请号： US17956751申请日： 2022-09-29
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公开(公告)号： US20230111938A1公开(公告)日： 2023-04-13
- 发明人: Benoit LAFAGE , Insaf MELIANE , Cyril HABERT , Gregoire AVOT
- 申请人： ARTERIS, INC.
- 申请人地址： US CA Campbell
- 专利权人： ARTERIS, INC.
- 当前专利权人： ARTERIS, INC.
- 当前专利权人地址： US CA Campbell
- 主分类号： G01R31/319
- IPC分类号： G01R31/319 ; G01R31/317 ; G01R31/302
摘要：
A system and method are disclosed for assembling a testbench for evaluating electronic systems. The method includes assembling large testbenches by using verification features associated with functional components, automatically creating component connections, and statistically checking the testbench prior to generation and simulation. The system includes a computer system that implements the method.
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