Embedded trace substrate (ETS) with embedded metal traces having multiple thicknesses for integrated circuit (IC) package height control, and related IC packages and fabrication methods. The IC package includes a die that is coupled to a package substrate to provide signal routing paths to the die. The IC package also includes an ETS that includes metal traces embedded in an insulating layer(s) to provide connections for signal routing paths for the IC package. To control (such as to reduce) the height of the IC package, the embedded metal traces embedded in an insulating layer in the ETS are provided to have multiple thicknesses (i.e., heights) in a vertical direction. The embedded metal traces in the ETS whose thicknesses affect the overall height of the IC package by being coupled to interconnects external to the ETS in the vertical direction, can be reduced in thickness to control IC package height.