Processing circuitry (10) performs processing in one of at least three domains (82, 84, 86, 88). Address translation circuitry (16) translates a virtual address of a memory access performed from a current domain to a physical address in one of a plurality of physical address spaces (61) selected based at least on the current domain. The domains include a root domain (82) for managing switching between other domains. The physical address spaces (61) include a root physical address space associated with the root domain (82), separate from physical address spaces associated with other domains.