A semiconductor device includes a substrate having a cell array region, a peripheral circuit region, and a connection region, a device separation region including a first device separation layer defining a cell active region on the cell array region, a second device separation layer defining a peripheral active region on the peripheral circuit region, and a third device separation layer defining an active dam on the connection region, a gate structure including a gate electrode crossing the cell active region on the cell array region, extending into the third device separation layer on the connection region, and having an end surface in the third device separation layer, and a gate contact plug electrically connected to the gate electrode on the connection region, wherein the third device separation layer includes a first insulating liner, a second insulating liner on the first insulating liner, and an embedded insulating layer.